This patent application relates generally to digital-to-analog converters (DACs) and, more particularly, to DACs with reduced parasitics.
DACs have increasingly proliferated in many areas of technology, such as signal processing and control applications. DACs allow system designers to capitalize on the increasing use of digital and signal processing circuitry, such as microcontrollers and microprocessors.
Many control systems accept analog signals as inputs (say, from sensors), and generate analog control outputs. Within the system, however, designers often seek to use digital circuitry and signal processing blocks to take advantage of the flexibility, reliability, standard fabrication, and low cost of such circuitry. DACs allow a control system that uses digital signal and data processing to interface with an analog world, for example, the device that the system seeks to control.
Conventional DACs typically fall into two categories: xe2x80x9cR-2Rxe2x80x9d DACs and weighted-capacitor DACs. R-2R DACs use a resistor ladder as part of their circuitry. The resistor ladder can occupy a relatively large area of the integrated circuitry (IC) within which the DAC resides. Thus, R-2R DACs result in increased area usage within the IC die and, hence, use of additional materials that results in higher costs.
Weighted-capacitor DACs overcome the area penalty of R-2R DACs by using a number of capacitors, rather than resistors. By using capacitors, weighted-capacitor DACs use less area than do R-2R DACs. Some weighted capacitor DACs, however, use a relatively large amount of total capacitance in their capacitor arrays. Consequently, they consume relatively large areas within the ICs in which they reside, thus increasing the cost of the integrated circuit. Furthermore, the weighted capacitors tend to have relatively small values. Consequently, parasitic capacitors (layout parasitic capacitors) within the IC may overwhelm the capacitors and adversely affect the performance of weighted-capacitor DACs. A need exists for weighted-capacitor DACs that are independent of the deleterious effects of layout parasitic capacitances.
This invention relates to DACs with reduced parasitics and to circuitry that include such DACs. One aspect of the invention relates to apparatus for DACs with reduced parasitics. In one embodiment, a DAC according to the invention includes a first capacitor network and a second capacitor network. Each of the first and second capacitor networks has at least one capacitor that has a weighted capacitance value. The DAC also includes a first amplifier and a second amplifier. An input of the first amplifier couples to the first capacitor network. An output of the first amplifier couples to the second capacitor network. An input of the second amplifier also couples to the second capacitor network.
In another embodiment, a DAC according to the invention includes a first capacitor network and a second capacitor network. Each of the first and second capacitor networks has at least one capacitor that has a weighted capacitance value. The DAC also includes a first amplifier, a second amplifier, and a third amplifier. The first amplifier has an input that couples to the first capacitor network, and an output that couples to an input of the second amplifier. An output of the second amplifier and an input of the third amplifier couple to the second capacitor network.
In another embodiment, a control system according to the invention includes an electrical apparatus and a controller that includes a DAC. The electrical apparatus is configured to be controllable in response to an electrical signal. The controller is configured to supply the electrical signal to the electrical apparatus. The DAC includes a first capacitor network, a second capacitor network, a first amplifier, and a second amplifier. An input of the first amplifier couples to the first capacitor network, whereas an output of the first amplifier couples to the second capacitor network. An input of the second amplifier couples to the second capacitor network. An output of the second amplifier provides the electrical signal to the electrical apparatus.
Another aspect of the invention relates to methods of converting digital signals to analog signals. In one embodiment, a method according to the invention of converting a digital signal to an analog signal includes coupling selectively at least one capacitor in a first capacitor network to one of two voltages in response to a corresponding first set of at least one bit in the digital signal. The method further includes amplifying a signal provided by the first capacitor network to generate an amplified signal, and amplifying the amplified signal to generate a second amplified signal. The method also includes supplying the second amplified signal to a second capacitor network that has at least one capacitor. The method further includes coupling selectively the at least one capacitor in the second capacitor network to one of the two voltages in response to a corresponding second set of at least one bit in the digital signal, and amplifying a second signal provided by the second capacitor network to generate the analog signal.
In another embodiment, a method according to the invention of controlling an electrical apparatus in a control system, where the electrical apparatus is configured to be controllable in response to an electrical signal. The method includes coupling selectively at least one capacitor in a first capacitor network to one of a first voltage and a second voltage in response to a corresponding first set of at least one bit in a digital signal, and amplifying a signal provided by the first capacitor network to generate an amplified signal. The method also includes supplying the amplified signal to a second capacitor network that has at least one capacitor. The method further includes coupling selectively the at least one capacitor in the second capacitor network to one of a second voltage and a third voltage in response to a corresponding second set of at least one bit in the digital, signal. The method also includes amplifying a signal provided by the second capacitor network to generate the electrical signal, and supplying the electrical signal to the electrical apparatus.